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vmls_u8(v64, v64, v64)

Multiply-Subtract from accumulator (vector, by element). This instruction multiplies the vector elements in the first source SIMD&FP register by the specified value in the second source SIMD&FP register, and subtracts the results from the vector elements of the destination SIMD&FP register. All the values in this instruction are unsigned integer values.Depending on the settings in the CPACR_EL1, CPTR_EL2, and CPTR_EL3 registers, and the current Security state and Exception level, an attempt to execute the instruction might be trapped. Equivalent instruction: MLS Vd.8B,Vn.8B,Vm.8B
Read time 1 minuteLast updated 21 days ago

Definition

public static v64 vmls_u8(v64 a0, v64 a1, v64 a2)

Parameters

a0

64-bit vector a0

a1

64-bit vector a1

a2

64-bit vector a2

Returns

Type

Description

v6464-bit vector