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vmlsq_u8(v128, v128, v128)

Multiply-Subtract from accumulator (vector, by element). This instruction multiplies the vector elements in the first source SIMD&FP register by the specified value in the second source SIMD&FP register, and subtracts the results from the vector elements of the destination SIMD&FP register. All the values in this instruction are unsigned integer values.Depending on the settings in the CPACR_EL1, CPTR_EL2, and CPTR_EL3 registers, and the current Security state and Exception level, an attempt to execute the instruction might be trapped. Equivalent instruction: MLS Vd.16B,Vn.16B,Vm.16B
Read time 1 minuteLast updated 24 days ago

Definition

public static v128 vmlsq_u8(v128 a0, v128 a1, v128 a2)

Parameters

128-bit vector a0

128-bit vector a1

128-bit vector a2

Returns

Type

Description

v128128-bit vector